Develop customized analog circuits, evaluate various options, create functional and load models, and document results for sharing with customers.
December 17, 2022
Recommend package layer stack-up, material, impedance targets and net assignments for signals.
January 16, 2023
Review Test Vehicles annually to determine if they are representative of market forward looking requirements.
January 19, 2023
Provide recommended connector pin-out configuration for optimized signal integrity performance.
February 28, 2023
Required experience and working knowledge of PCB board level simulation tools like Cadence System SI, Speed 2000, Power SI, Specctraquest, Sigxp etc.
March 20, 2023
Leadership role in building a strong global organization driving robust SI/PI hardened advanced interface memory and SerDes IP products.
April 29, 2023
Understanding of PCB construction and design, transmission line theory, I/O circuit technology analysis and high-speed Gbps serial data interface signal integrity challenges.
May 06, 2023
Create low cost, short lead time testing methods that predict high speed material system performance to allow for quicker response to R&D testing.
May 16, 2023