Semiconductor Process Engineer Salary at Intel Capital Corp BETA

Semiconductor Engineering Technicians Intermediate/Advanced are needed for an 18 month contract opportunity with Yoh’s client located in Austin, Texas. Candidates must take direction from management staff (Physicists and Engineers) and be able to independently provide expertise to accomplish assigned tasks. The successful candidate(s) must have the ability to communicate effectively and interact with a diverse project team to collect, compile, maintain and interpret data and test results accurately. Pay Rate: $22 to $26 per hour What You Will Be Doing Performs moderately complex electro-mechanical technical functions and activities such as design, test, checkout, fabrication, modification, troubleshooting and assembly of electronics and electro-mechanical systems, experimental design circuitry, prototype models, specialized test equipment, tools and test fixtures. Tests and troubleshoots system level and component level problems in electrical and mechanical systems and sub-systems. May

Graveyard Shift Semiconductor Engineering Process Technician needed for an 18-month contract to hire opportunity with Yoh’s client located in Santa Clara, California. Pay Rate: $32 to $37 per hour The Big Picture – Top Skills You Should Possess: Solid interpersonal skills Strong analytical skills Ability to quickly adapt to change What You Will Be Doing: Supporting Clean Room Metrology Lab operations Coordinates with engineering on samples priorities Mounting, dismounting, cleaning and handling customer samples – coupons and wafers Tracking and maintaining order of the incoming jobs and their execution Knowledgeably operates laboratory process equipment and instrumentation Execution of metrology jobs by using developed BKMs and available recipes on SEM metrology tools Performing analysis of metrology images with company proprietary algorithms and SW, with predefined (available) recipes Report preparation according to predefined template Interface with requestors, understand their detai

This engineer will support documentation, implementation, and improving robust mechanical assembly methodology in the areas of IR scene projector arrays, detector modules, RF or Digital semiconductor electrical component and IC chips assembly and packaging in a broad range of configurations. Essential Duties & Responsibilities: Develop and manage assembly processes - such as die attaching, wire bonding, underfill, flip-chip assembly process, Assist with development and design of advanced packaging and electromechanical fixturing for customer requirements or internal demands Conceive methods and processes to meet customer's prototype packaging and assembly requirements Develop bills of materials and operation routers for assembly projects including time studies and workflow analysis Support operation of semiconductor processing equipment Drive cost reduction and yield improvement projects Job Qualifications: Semiconductor wafer processing experience in a cleanroom environment is a plus.

Graveyard Shift Semiconductor Engineering Process Technician needed for an 18-month contract to hire opportunity with Yoh's client located in Santa Clara, California. Pay Rate: $32 to $37 per hour The Big Picture - Top Skills You Should Possess: Solid interpersonal skills Strong analytical skills Ability to quickly adapt to change What You Will Be Doing: Supporting Clean Room Metrology Lab operations Coordinates with engineering on samples priorities Mounting, dismounting, cleaning and handling customer samples - coupons and wafers Tracking and maintaining order of the incoming jobs and their execution Knowledgeably operates laboratory process equipment and instrumentation Execution of metrology jobs by using developed BKMs and available recipes on SEM metrology tools Performing analysis of metrology images with company proprietary algorithms and SW, with predefined (available) recipes Report preparation according to predefined template Interface with requestors, understand their detai

**Job Description:** We are looking for a motivated Senior Electrical Engineer who will be responsible for leading new product development as well as validating SOC, high speed digital interface, NAND, LPDDR2, eMMC and misc. analog circuits using oscilloscopes, logic analyzer and chamber. **Key Responsibilities:** + Support design and projects in the areas of regulatory compliance, reliability analysis and testing, components selections and development process. + Write clear and precise design and validation documentation. + Work with manufacturing in defining the tests and fixtures needed for programming, functional verification and final tests. + Provide technical support to internal departments. **Job Requirements:** + Bachelors degree in electrical/Electronic Engineering required, masters degree preferred. + At least 5 years of hands-on experience related to development and validation of SOC, high speed digital interfaces, LPDDR, NAND, eMMC, signal integrity, ARM, DSP, power manage

**Position- Mixed Signal DV Engineer** **Location-** **Sunnyvale CA - Onsite role** **Job description:** We are seeking Mixed signal Design Verification Engineer who is proficient in system verilog real number modeling and experience with UVM. Proficient in debug skills and experienced with gate level parasitic annotated simulations. Candidate should be available to work during the US work hours. **Key responsibilities:** + System verilog real number modeling + Writing regression tests for analog behavioral model verification + Generating randomized vectors for analog behavioral model verification + Developing checker & writing assertions. **Required Skills:** + Proficient in system verilog real number modeling + Familiarity with writing regression tests for analog behavioral model verification + Hands on experience with UVM + Familiarity with generating randomized vectors for analog behavioral model verification. + Familiar with developing checker & writing assertions. + This is runni

**Job role:** **Lead DV IP Verification Engineer** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create verification environments using System-Verilog and UVM (Universal verification) methodology for IP verification. IP verification must have and SoC verification good to have. **Key responsibilities** SystemVerilog/UVM/C /Python **Required Skills** + Proficiency and proven work experience in UVM & System Verilog based DV development. + Strong knowledge in SV Assertions, UVM/OVM and functional and code coverage analysis. + Python scripting experience + C/C based reference model debug experience. + Strong regression failure and root cause analysis + Independent, self-motivated with good analytical & communication skills **Life at Capgemini** Capgemini supports all aspects of your well-being throughout the changing stages of your life and career. For eligible employees, we offer: + Flexible work + Healthcare including dental, vision, mental health,

Director of Sales Austin TX and San Francisco Bay area,CA Full Time Job Description: Qualifications Semiconductor: Direct experience selling Semiconductor Engineering/Design Services. VLSI design services, etc, End-to-end Silicon verification experience, and selling to Hyperscalers (Meta, etc), OEMs, and Tier 1s. Candidates with experience selling “products” are not highly desirable. Must be Hunter mentality and are individual contributors.